patch-2.4.0-test9 linux/arch/i386/kernel/smpboot.c

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diff -u --recursive --new-file v2.4.0-test8/linux/arch/i386/kernel/smpboot.c linux/arch/i386/kernel/smpboot.c
@@ -46,7 +46,7 @@
 #include <asm/pgalloc.h>
 
 /* Set if we find a B stepping CPU			*/
-static int smp_b_stepping = 0;
+static int smp_b_stepping;
 
 /* Setup configured maximum number of CPUs to activate */
 static int max_cpus = -1;
@@ -55,21 +55,21 @@
 int smp_num_cpus = 1;
 
 /* Bitmask of currently online CPUs */
-unsigned long cpu_online_map = 0;
+unsigned long cpu_online_map;
 
 /* which CPU (physical APIC ID) maps to which logical CPU number */
 volatile int x86_apicid_to_cpu[NR_CPUS];
 /* which logical CPU number maps to which CPU (physical APIC ID) */
 volatile int x86_cpu_to_apicid[NR_CPUS];
 
-static volatile unsigned long cpu_callin_map = 0;
-static volatile unsigned long cpu_callout_map = 0;
+static volatile unsigned long cpu_callin_map;
+static volatile unsigned long cpu_callout_map;
 
 /* Per CPU bogomips and other parameters */
 struct cpuinfo_x86 cpu_data[NR_CPUS];
 
 /* Set when the idlers are all forked */
-int smp_threads_ready = 0;
+int smp_threads_ready;
 
 /*
  * Setup routine for controlling SMP activation
@@ -194,7 +194,7 @@
 static atomic_t tsc_start_flag = ATOMIC_INIT(0);
 static atomic_t tsc_count_start = ATOMIC_INIT(0);
 static atomic_t tsc_count_stop = ATOMIC_INIT(0);
-static unsigned long long tsc_values[NR_CPUS] = { 0, };
+static unsigned long long tsc_values[NR_CPUS];
 
 #define NR_LOOPS 5
 
@@ -438,7 +438,7 @@
 		synchronize_tsc_ap();
 }
 
-int cpucount = 0;
+int cpucount;
 
 extern int cpu_idle(void);
 
@@ -774,7 +774,7 @@
 }
 
 cycles_t cacheflush_time;
-extern unsigned long cpu_hz;
+extern unsigned long cpu_khz;
 
 static void smp_tune_scheduling (void)
 {
@@ -791,7 +791,7 @@
 	 *  the cache size)
 	 */
 
-	if (!cpu_hz) {
+	if (!cpu_khz) {
 		/*
 		 * this basically disables processor-affinity
 		 * scheduling on SMP without a TSC.
@@ -805,12 +805,12 @@
 			bandwidth = 100;
 		}
 
-		cacheflush_time = (cpu_hz>>20) * (cachesize<<10) / bandwidth;
+		cacheflush_time = (cpu_khz>>10) * (cachesize<<10) / bandwidth;
 	}
 
 	printk("per-CPU timeslice cutoff: %ld.%02ld usecs.\n",
-		(long)cacheflush_time/(cpu_hz/1000000),
-		((long)cacheflush_time*100/(cpu_hz/1000000)) % 100);
+		(long)cacheflush_time/(cpu_khz/1000),
+		((long)cacheflush_time*100/(cpu_khz/1000)) % 100);
 }
 
 /*

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