patch-2.4.0-test6 linux/arch/mips64/mm/r4xx0.c

• Lines: 236
• Date: Sun Aug 6 11:43:17 2000
• Orig file: v2.4.0-test5/linux/arch/mips64/mm/r4xx0.c
• Orig date: Mon Jul 10 16:47:20 2000

diff -u --recursive --new-file v2.4.0-test5/linux/arch/mips64/mm/r4xx0.c linux/arch/mips64/mm/r4xx0.c
@@ -1750,7 +1750,7 @@
  */
 static void r4k_flush_page_to_ram_s16d16i16(struct page * page)
 {
-	unsigned long addr = page_address(page) & PAGE_MASK;
+	unsigned long addr = (unsigned long) page_address(page) & PAGE_MASK;
 
 	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
 #ifdef DEBUG_CACHE
@@ -1762,7 +1762,7 @@
 
 static void r4k_flush_page_to_ram_s32d16i16(struct page * page)
 {
-	unsigned long addr = page_address(page) & PAGE_MASK;
+	unsigned long addr = (unsigned long) page_address(page) & PAGE_MASK;
 
 	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
 #ifdef DEBUG_CACHE
@@ -1774,7 +1774,7 @@
 
 static void r4k_flush_page_to_ram_s64d16i16(struct page * page)
 {
-	unsigned long addr = page_address(page) & PAGE_MASK;
+	unsigned long addr = (unsigned long) page_address(page) & PAGE_MASK;
 
 	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
 #ifdef DEBUG_CACHE
@@ -1786,7 +1786,7 @@
 
 static void r4k_flush_page_to_ram_s128d16i16(struct page * page)
 {
-	unsigned long addr = page_address(page) & PAGE_MASK;
+	unsigned long addr = (unsigned long) page_address(page) & PAGE_MASK;
 
 	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
 #ifdef DEBUG_CACHE
@@ -1798,7 +1798,7 @@
 
 static void r4k_flush_page_to_ram_s32d32i32(struct page * page)
 {
-	unsigned long addr = page_address(page) & PAGE_MASK;
+	unsigned long addr = (unsigned long) page_address(page) & PAGE_MASK;
 
 	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
 #ifdef DEBUG_CACHE
@@ -1810,7 +1810,7 @@
 
 static void r4k_flush_page_to_ram_s64d32i32(struct page * page)
 {
-	unsigned long addr = page_address(page) & PAGE_MASK;
+	unsigned long addr = (unsigned long) page_address(page) & PAGE_MASK;
 
 	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
 #ifdef DEBUG_CACHE
@@ -1822,7 +1822,7 @@
 
 static void r4k_flush_page_to_ram_s128d32i32(struct page * page)
 {
-	unsigned long addr = page_address(page) & PAGE_MASK;
+	unsigned long addr = (unsigned long) page_address(page) & PAGE_MASK;
 
 	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
 #ifdef DEBUG_CACHE
@@ -1834,7 +1834,7 @@
 
 static void r4k_flush_page_to_ram_d16i16(struct page * page)
 {
-	unsigned long addr = page_address(page) & PAGE_MASK;
+	unsigned long addr = (unsigned long) page_address(page) & PAGE_MASK;
 
 	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
 		unsigned long flags;
@@ -1850,7 +1850,7 @@
 
 static void r4k_flush_page_to_ram_d32i32(struct page * page)
 {
-	unsigned long addr = page_address(page) & PAGE_MASK;
+	unsigned long addr = (unsigned long) page_address(page) & PAGE_MASK;
 
 	if ((addr >= KSEG0 && addr < KSEG1) || (addr >= KSEG2)) {
 		unsigned long flags;
@@ -1882,7 +1882,7 @@
 	unsigned int flags;
 
 	if (size >= dcache_size) {
-		flush_cache_all();
+		flush_cache_l1();
 	} else {
 		/* Workaround for R4600 bug.  See comment above. */
 		__save_and_cli(flags);
@@ -1906,7 +1906,7 @@
 	unsigned long end, a;
 
 	if (size >= scache_size) {
-		flush_cache_all();
+		flush_cache_l1();
 		return;
 	}
 
@@ -1926,7 +1926,7 @@
 	unsigned int flags;
 
 	if (size >= dcache_size) {
-		flush_cache_all();
+		flush_cache_l1();
 	} else {
 		/* Workaround for R4600 bug.  See comment above. */
 		__save_and_cli(flags);
@@ -1951,7 +1951,7 @@
 	unsigned long end, a;
 
 	if (size >= scache_size) {
-		flush_cache_all();
+		flush_cache_l1();
 		return;
 	}
 
@@ -2146,6 +2146,11 @@
 	}
 }
 
+static void
+r4k_flush_cache_l2(void)
+{
+}
+
 #ifdef DEBUG_TLBUPDATE
 static unsigned long ehi_debug[NTLB_ENTRIES];
 static unsigned long el0_debug[NTLB_ENTRIES];
@@ -2165,6 +2170,12 @@
 	pte_t *ptep;
 	int idx, pid;
 
+	/*
+	 * Handle debugger faulting in for debugee.
+	 */
+	if (current->active_mm != vma->vm_mm)
+		return;
+
 	__save_and_cli(flags);
 	pid = (get_entryhi() & 0xff);
 
@@ -2371,7 +2382,7 @@
 	case 16:
 		_clear_page = r4k_clear_page_d16;
 		_copy_page = r4k_copy_page_d16;
-		_flush_cache_all = r4k_flush_cache_all_d16i16;
+		_flush_cache_l1 = r4k_flush_cache_all_d16i16;
 		_flush_cache_mm = r4k_flush_cache_mm_d16i16;
 		_flush_cache_range = r4k_flush_cache_range_d16i16;
 		_flush_cache_page = r4k_flush_cache_page_d16i16;
@@ -2389,7 +2400,7 @@
 			_clear_page = r4k_clear_page_d32;
 			_copy_page = r4k_copy_page_d32;
 		}
-		_flush_cache_all = r4k_flush_cache_all_d32i32;
+		_flush_cache_l1 = r4k_flush_cache_all_d32i32;
 		_flush_cache_mm = r4k_flush_cache_mm_d32i32;
 		_flush_cache_range = r4k_flush_cache_range_d32i32;
 		_flush_cache_page = r4k_flush_cache_page_d32i32;
@@ -2407,7 +2418,7 @@
 	case 16:
 		switch(dc_lsize) {
 		case 16:
-			_flush_cache_all = r4k_flush_cache_all_s16d16i16;
+			_flush_cache_l1 = r4k_flush_cache_all_s16d16i16;
 			_flush_cache_mm = r4k_flush_cache_mm_s16d16i16;
 			_flush_cache_range = r4k_flush_cache_range_s16d16i16;
 			_flush_cache_page = r4k_flush_cache_page_s16d16i16;
@@ -2422,14 +2433,14 @@
 	case 32:
 		switch(dc_lsize) {
 		case 16:
-			_flush_cache_all = r4k_flush_cache_all_s32d16i16;
+			_flush_cache_l1 = r4k_flush_cache_all_s32d16i16;
 			_flush_cache_mm = r4k_flush_cache_mm_s32d16i16;
 			_flush_cache_range = r4k_flush_cache_range_s32d16i16;
 			_flush_cache_page = r4k_flush_cache_page_s32d16i16;
 			_flush_page_to_ram = r4k_flush_page_to_ram_s32d16i16;
 			break;
 		case 32:
-			_flush_cache_all = r4k_flush_cache_all_s32d32i32;
+			_flush_cache_l1 = r4k_flush_cache_all_s32d32i32;
 			_flush_cache_mm = r4k_flush_cache_mm_s32d32i32;
 			_flush_cache_range = r4k_flush_cache_range_s32d32i32;
 			_flush_cache_page = r4k_flush_cache_page_s32d32i32;
@@ -2442,14 +2453,14 @@
 	case 64:
 		switch(dc_lsize) {
 		case 16:
-			_flush_cache_all = r4k_flush_cache_all_s64d16i16;
+			_flush_cache_l1 = r4k_flush_cache_all_s64d16i16;
 			_flush_cache_mm = r4k_flush_cache_mm_s64d16i16;
 			_flush_cache_range = r4k_flush_cache_range_s64d16i16;
 			_flush_cache_page = r4k_flush_cache_page_s64d16i16;
 			_flush_page_to_ram = r4k_flush_page_to_ram_s64d16i16;
 			break;
 		case 32:
-			_flush_cache_all = r4k_flush_cache_all_s64d32i32;
+			_flush_cache_l1 = r4k_flush_cache_all_s64d32i32;
 			_flush_cache_mm = r4k_flush_cache_mm_s64d32i32;
 			_flush_cache_range = r4k_flush_cache_range_s64d32i32;
 			_flush_cache_page = r4k_flush_cache_page_s64d32i32;
@@ -2462,14 +2473,14 @@
 	case 128:
 		switch(dc_lsize) {
 		case 16:
-			_flush_cache_all = r4k_flush_cache_all_s128d16i16;
+			_flush_cache_l1 = r4k_flush_cache_all_s128d16i16;
 			_flush_cache_mm = r4k_flush_cache_mm_s128d16i16;
 			_flush_cache_range = r4k_flush_cache_range_s128d16i16;
 			_flush_cache_page = r4k_flush_cache_page_s128d16i16;
 			_flush_page_to_ram = r4k_flush_page_to_ram_s128d16i16;
 			break;
 		case 32:
-			_flush_cache_all = r4k_flush_cache_all_s128d32i32;
+			_flush_cache_l1 = r4k_flush_cache_all_s128d32i32;
 			_flush_cache_mm = r4k_flush_cache_mm_s128d32i32;
 			_flush_cache_range = r4k_flush_cache_range_s128d32i32;
 			_flush_cache_page = r4k_flush_cache_page_s128d32i32;
@@ -2538,13 +2549,14 @@
 	_flush_tlb_mm = r4k_flush_tlb_mm;
 	_flush_tlb_range = r4k_flush_tlb_range;
 	_flush_tlb_page = r4k_flush_tlb_page;
+	_flush_cache_l2 = r4k_flush_cache_l2;
 
 	update_mmu_cache = r4k_update_mmu_cache;
 
 	_show_regs = r4k_show_regs;
 	_user_mode = r4k_user_mode;
 
-	flush_cache_all();
+	flush_cache_l1();
 
 	/*
 	 * You should never change this register: