patch-2.4.0-test12 linux/arch/arm/kernel/fiq.c

• Lines: 40
• Date: Mon Nov 27 17:07:59 2000
• Orig file: v2.4.0-test11/linux/arch/arm/kernel/fiq.c
• Orig date: Sun Aug 13 09:54:15 2000

diff -u --recursive --new-file v2.4.0-test11/linux/arch/arm/kernel/fiq.c linux/arch/arm/kernel/fiq.c
@@ -131,15 +131,14 @@
 #endif
 #ifdef CONFIG_CPU_32
 	"mrs	%0, cpsr
-	bic	%1, %0, #0xf
-	orr	%1, %1, #0xc1
-	msr	cpsr, %1	@ select FIQ mode
+	mov	%1, #0xc1
+	msr	cpsr_c, %1	@ select FIQ mode
 	mov	r0, r0
 	ldmia	%2, {r8 - r14}
-	msr	cpsr, %0	@ return to SVC mode
+	msr	cpsr_c, %0	@ return to SVC mode
 	mov	r0, r0"
 #endif
-	: "=r" (tmp), "=r" (tmp2)
+	: "=&r" (tmp), "=&r" (tmp2)
 	: "r" (&regs->ARM_r8)
 	/* These registers aren't modified by the above code in a way
 	   visible to the compiler, but we mark them as clobbers anyway
@@ -164,15 +163,14 @@
 #endif
 #ifdef CONFIG_CPU_32
 	"mrs	%0, cpsr
-	bic	%1, %0, #0xf
-	orr	%1, %1, #0xc1
-	msr	cpsr, %1	@ select FIQ mode
+	mov	%1, #0xc1
+	msr	cpsr_c, %1	@ select FIQ mode
 	mov	r0, r0
 	stmia	%2, {r8 - r14}
-	msr	cpsr, %0	@ return to SVC mode
+	msr	cpsr_c, %0	@ return to SVC mode
 	mov	r0, r0"
 #endif
-	: "=r" (tmp), "=r" (tmp2)
+	: "=&r" (tmp), "=&r" (tmp2)
 	: "r" (&regs->ARM_r8)
 	/* These registers aren't modified by the above code in a way
 	   visible to the compiler, but we mark them as clobbers anyway