patch-2.4.0-test11 linux/arch/sparc64/kernel/dtlb_prot.S

• Lines: 83
• Date: Sun Nov 12 20:37:16 2000
• Orig file: v2.4.0-test10/linux/arch/sparc64/kernel/dtlb_prot.S
• Orig date: Mon Mar 27 10:35:56 2000

diff -u --recursive --new-file v2.4.0-test10/linux/arch/sparc64/kernel/dtlb_prot.S linux/arch/sparc64/kernel/dtlb_prot.S
@@ -1,4 +1,4 @@
-/* $Id: dtlb_prot.S,v 1.20 2000/03/26 09:13:48 davem Exp $
+/* $Id: dtlb_prot.S,v 1.21 2000/11/10 08:28:45 davem Exp $
  * dtlb_prot.S: DTLB protection trap strategy.
  *              This is included directly into the trap table.
  *
@@ -6,10 +6,6 @@
  * Copyright (C) 1997,1998 Jakub Jelinek   (jj@ultra.linux.cz)
  */
 
-#define TAG_CONTEXT_BITS	0x3ff
-#define VPTE_SHIFT		(PAGE_SHIFT - 3)
-#define MODIFIED_BITS		(_PAGE_WRITE | _PAGE_W | _PAGE_MODIFIED | _PAGE_ACCESSED)
-
 /* Ways we can get here:
  *
  * [TL == 0] 1) User stores to readonly pages.
@@ -18,45 +14,41 @@
  */
 
 /* PROT ** ICACHE line 1: User DTLB protection trap	*/
-	ldxa		[%g1] ASI_DMMU, %g6		! Primary or Secondary ctx?
-	and		%g6, 0x10, %g6			! Get pri/sec ctx bit
 	stxa		%g0, [%g1] ASI_DMMU		! Clear SFSR FaultValid bit
 	membar		#Sync				! Synchronize ASI stores
-	ldxa		[%g1 + %g1] ASI_DMMU, %g4	! Load TAG_ACCESS
-	andn		%g4, TAG_CONTEXT_BITS, %g4	! Clear CTX bits
-	stxa		%g0, [%g4 + %g6] ASI_DMMU_DEMAP	! Perform TLB flush of page
-	membar		#Sync				! Synchronize ASI stores
-
-/* PROT ** ICACHE line 2: Further normal processing	*/
-	srax		%g4, VPTE_SHIFT, %g6		! Compute VPTE offset
-	ldxa		[%g3 + %g6] ASI_S, %g5		! Load PTE entry
-	andcc		%g5, _PAGE_WRITE, %g0		! Writable page?
-	be,pt		%xcc, 1f			! Nope, real fault
-	 or		%g5, (MODIFIED_BITS), %g5	! Mark as writable/modified
-	stxa		%g5, [%g3 + %g6] ASI_S		! Update PTE entry
-	stxa		%g5, [%g0] ASI_DTLB_DATA_IN	! Load PTE into TLB
-	retry						! Trap return
-
-/* PROT ** ICACHE line 3: Real user faults		*/
-1:	rdpr		%pstate, %g5			! Move into alternate globals
+	rdpr		%pstate, %g5			! Move into alternate globals
 	wrpr		%g5, PSTATE_AG|PSTATE_MG, %pstate
 	rdpr		%tl, %g1			! Need to do a winfixup?
 	cmp		%g1, 1				! Trap level >1?
 	mov		TLB_TAG_ACCESS, %g4		! Prepare reload of vaddr
+	nop
+
+/* PROT ** ICACHE line 2: More real fault processing */
 	bgu,pn		%xcc, winfix_trampoline		! Yes, perform winfixup
 	 ldxa		[%g4] ASI_DMMU, %g5		! Put tagaccess in %g5
 	ba,pt		%xcc, sparc64_realfault_common	! Nope, normal fault
-
-/* PROT ** ICACHE line 4: More real fault processing */
 	 mov		FAULT_CODE_DTLB | FAULT_CODE_WRITE, %g4
 	nop
 	nop
 	nop
 	nop
+
+/* PROT ** ICACHE line 3: Unused...	*/
+	nop
+	nop
+	nop
+	nop
+	nop
 	nop
 	nop
 	nop
 
-#undef TAG_CONTEXT_BITS
-#undef VPTE_SHIFT
-#undef MODIFIED_BITS
+/* PROT ** ICACHE line 3: Unused...	*/
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop
+	nop