patch-2.4.0-prerelease linux/drivers/video/matrox/matroxfb_DAC1064.c

• Lines: 95
• Date: Fri Dec 29 14:07:23 2000
• Orig file: v2.4.0-test12/linux/drivers/video/matrox/matroxfb_DAC1064.c
• Orig date: Thu Aug 10 12:34:31 2000

diff -u --recursive --new-file v2.4.0-test12/linux/drivers/video/matrox/matroxfb_DAC1064.c linux/drivers/video/matrox/matroxfb_DAC1064.c
@@ -227,15 +227,35 @@
 	DBG("DAC1064_calcclock")
 
 	fvco = PLL_calcclock(PMINFO freq, fmax, in, feed, &p);
-	p = (1 << p) - 1;
-	if (fvco <= 100000)
-		;
-	else if (fvco <= 140000)
-		p |= 0x08;
-	else if (fvco <= 180000)
-		p |= 0x10;
-	else
-		p |= 0x18;
+	
+	if (ACCESS_FBINFO(devflags.g450dac)) {
+		if (fvco <= 300000)		/* 276-324 */
+			;
+		else if (fvco <= 400000)	/* 378-438 */
+			p |= 0x08;
+		else if (fvco <= 550000)	/* 540-567 */
+			p |= 0x10;
+		else if (fvco <= 690000)	/* 675-695 */
+			p |= 0x18;
+		else if (fvco <= 800000)	/* 776-803 */
+			p |= 0x20;
+		else if (fvco <= 891000)	/* 891-891 */
+			p |= 0x28;
+		else if (fvco <= 940000)	/* 931-945 */
+			p |= 0x30;
+		else				/* <959 */
+			p |= 0x38;
+	} else {
+		p = (1 << p) - 1;
+		if (fvco <= 100000)
+			;
+		else if (fvco <= 140000)
+			p |= 0x08;
+		else if (fvco <= 180000)
+			p |= 0x10;
+		else
+			p |= 0x18;
+	}
 	*post = p;
 }
 
@@ -340,15 +360,19 @@
 	hw->DACreg[POS1064_XMISCCTRL] &= M1064_XMISCCTRL_DAC_WIDTHMASK;
 	hw->DACreg[POS1064_XMISCCTRL] |= M1064_XMISCCTRL_LUT_EN;
 	hw->DACreg[POS1064_XPIXCLKCTRL] = M1064_XPIXCLKCTRL_PLL_UP | M1064_XPIXCLKCTRL_EN | M1064_XPIXCLKCTRL_SRC_PLL;
-#if defined(CONFIG_FB_MATROX_MAVEN) || defined(CONFIG_FB_MATROX_MAVEN_MODULE)
+	hw->DACreg[POS1064_XOUTPUTCONN] = 0x01;	/* output #1 enabled */
 	if (ACCESS_FBINFO(output.ph) & MATROXFB_OUTPUT_CONN_SECONDARY) {
-		hw->DACreg[POS1064_XPIXCLKCTRL] = M1064_XPIXCLKCTRL_PLL_UP | M1064_XPIXCLKCTRL_EN | M1064_XPIXCLKCTRL_SRC_EXT;
-		hw->DACreg[POS1064_XMISCCTRL] |= GX00_XMISCCTRL_MFC_MAFC | G400_XMISCCTRL_VDO_MAFC12;
+		if (ACCESS_FBINFO(devflags.g450dac)) {
+			hw->DACreg[POS1064_XPIXCLKCTRL] = M1064_XPIXCLKCTRL_PLL_UP | M1064_XPIXCLKCTRL_EN | M1064_XPIXCLKCTRL_SRC_PLL2;
+			hw->DACreg[POS1064_XOUTPUTCONN] = 0x05;	/* output #1 enabled; CRTC1 connected to output #2 */
+		} else {
+			hw->DACreg[POS1064_XPIXCLKCTRL] = M1064_XPIXCLKCTRL_PLL_UP | M1064_XPIXCLKCTRL_EN | M1064_XPIXCLKCTRL_SRC_EXT;
+			hw->DACreg[POS1064_XMISCCTRL] |= GX00_XMISCCTRL_MFC_MAFC | G400_XMISCCTRL_VDO_MAFC12;
+		}
 	} else if (ACCESS_FBINFO(output.sh) & MATROXFB_OUTPUT_CONN_SECONDARY) {
 		hw->DACreg[POS1064_XMISCCTRL] |= GX00_XMISCCTRL_MFC_MAFC | G400_XMISCCTRL_VDO_C2_MAFC12;
-	} else 
-#endif	
-	if (ACCESS_FBINFO(output.ph) & MATROXFB_OUTPUT_CONN_DFP)
+		hw->DACreg[POS1064_XOUTPUTCONN] = 0x09; /* output #1 enabled; CRTC2 connected to output #2 */
+	} else if (ACCESS_FBINFO(output.ph) & MATROXFB_OUTPUT_CONN_DFP)
 		hw->DACreg[POS1064_XMISCCTRL] |= GX00_XMISCCTRL_MFC_PANELLINK | G400_XMISCCTRL_VDO_MAFC12;
 	else
 		hw->DACreg[POS1064_XMISCCTRL] |= GX00_XMISCCTRL_MFC_DIS;
@@ -363,6 +387,10 @@
 	if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400) {
 		outDAC1064(PMINFO 0x20, 0x04);
 		outDAC1064(PMINFO 0x1F, 0x00);
+		if (ACCESS_FBINFO(devflags.g450dac)) {
+			outDAC1064(PMINFO M1064_X8B, 0xCC);	/* only matrox know... */
+			outDAC1064(PMINFO M1064_XOUTPUTCONN, hw->DACreg[POS1064_XOUTPUTCONN]);
+		}
 	}
 }
 
@@ -738,7 +766,11 @@
 	DBG("MGAG100_preinit")
 
 	/* there are some instabilities if in_div > 19 && vco < 61000 */
-	ACCESS_FBINFO(features.pll.vco_freq_min) = 62000;
+	if (ACCESS_FBINFO(devflags.g450dac)) {
+		ACCESS_FBINFO(features.pll.vco_freq_min) = 130000;	/* my sample: >118 */
+	} else {
+		ACCESS_FBINFO(features.pll.vco_freq_min) = 62000;
+	}
 	ACCESS_FBINFO(features.pll.ref_freq)	 = 27000;
 	ACCESS_FBINFO(features.pll.feed_div_min) = 7;
 	ACCESS_FBINFO(features.pll.feed_div_max) = 127;