1 DDLC CARD by Matti Aarnio Mar-92 The DDLC card by Matti Aarnio, OH1MQK Kurkelankatu 8 as 1 SF-21100 Naantali FINLAND with contributions by Kate Alhola Tom Javen, OH1JI This card is aimed for multiple uses, among which are: o Quad high speed synchronous HDLC channels o ISDN S-bus Terminal Equipement (with an option of being an NT without power feeder.) o Mixture of above (1 or 2 high-speed serials, with 3 or 2 BR-ISDN channels.) o Must work on 8-bit 8088 system without loading it more than any decent ethernet cards do. (One interrupt per data packet.) Distinctive hardware features: o 8-bit PC-bus card which uses only memory space, and only single IRQ line. (No DMA) o Utilizes Motorola MC145488FN Dual Datalink Controller (DDLC) ICs, which are especially designed for the BR-ISDN use, but also have `classical' modem interfaces. o Serial units store/read local dual-ported RAM, which can be configured into 16kB or 32kB size, and addressed anywhere within 8-bit expansion bus area of 1 MB. (Card is equiped with 32kB, of which half can be disabled if it doesn't fit the machine.) o Datarates depend only upon external modems, which must provide clocks to this board. o Board has 4 flat-cable connectors of 20 pins each for the use with various feature adapters. o Feature adapters can be controlled by individually enabled SCP/SPI serial links. (Simultaneous enable of more than one adapter is possible, but not recommended.) o Board has optional ISDN S/T-bus tranceiver unit. (MC145474) (Connects to home S-bus -- CCITT I.430) 2 DDLC CARD by Matti Aarnio Mar-92 Technical details: Feature adapter connectors: 20 pin flat-cable connector with pinout: 1 Modem TxD IDL TxD output 2 GND 3 Modem RxD IDL RxD input 4 GND 5 Modem TxCLK IDL CLOCK input 6 GND 7 Modem RxCLK IDL SYNC input 8 GND 9 Modem /RTS unused/DREQ output 10 Modem /CTS unused/DGNT input 11 Modem /DTR unused output (1) 12 Modem /DSR unused input (1) 13 Modem /DCD SCP may use input/output(2) 14 /SCP_ENA output (3) 15 SCP CLK output 16 SCP Rx input 17 SCP Tx output 18 GND 19 +5V 20 +5V Notes: 1: This signal pair is controlled by the writable enable register at the BASE+$100 (256 locations..) Bits D4-D7 are /DTR0 .. /DTR3 respectively. While reading the same address, D4 .. D7 represent /DSR0 .. /DSR3. (See "Programming model") 2: SCP reserves most of non-IDL signals from DDLC IC number one. (U9) 3: Each applique card is enabled individually by bits D0-3 of BASE+$100 register. Only one is recommended to be active at any time. Bit polarity is not reversed at the register. 4: All signals are TTL level. 5: If the applique needs +-12V, that must be generated at the applique card from the +5V feed. (Max ca. 0.5 A) Good decoupling is recommened. 6: "input" is input to the DDLC card from the applique. 7: What Motorola calls IDL, others know also as IOM-2. Feature adapters have been specified for: V.28 "The classical D-25 modem adaptation" (sync) V.11/V.36 Sync differential 64kbps - 10Mbps V.35 Sync differential 0-64kbps (-2Mbps) X.21 Sync differential ca. 64kbps. (D-15) (May include support processor for BISYNC extraction/generation.) G3RUH Radio-amateur use. TTL levels, opto- isolated. (Includes other modems also.) 3 DDLC CARD by Matti Aarnio Mar-92 Configuring the hardware: Making the decission of installing optional components: - Second DDLC IC - ISDN S/T tranceiver and associated components Base address selection: Base address selection at 16kB granularity can be done with J2. Each inserted short-circuit piece means 0 at the address. A19 = pin 1-12, A14 = pin 6-7. (Silk-screen has/had it wrong, plugs MUST be HORISONTALLY.) Selecting Dual-port RAM size is done with J8, which has valid connections of 1-2 + 5-6 (32kB size), and 2-3 + 4-5 (16kB size). IRQ: Selecting the output IRQ line is done with J1, which has pins in the order of 1=IRQ2,..6=IRQ7. IRQ line is driven with open-collector device, and line has 10k ohms pull-up, thus sharing same IRQ is possible between two similar cards. ISDN: ISDN use affects jumpers J3, J4, J5, and J6. When they are inserted, that particular part of DDLC is used at the ISDN IDL link. It requires a clock signal from IDL master, which in this case is S/T tranceiver (MC145474). If S/T tranceiver has not been installed, none of J3 - J6 should be jumpered. (Unless another IDL master is at one of the feature adapters..) When S/T tranceiver is used, selection of having 100 ohms line terminator resistors at the board in use is done with J7, and selecting mode of Terminal Equipement (TE) vs. Network Termination (NT) is done with J9: 1-2 = NT, 2-3 = TE. Appliques: None of JP3-JP6 (applique connectors) should be used with IDL mode device (except maybe audio codec) Applique SCP enables are individually controlled by software. 4 DDLC CARD by Matti Aarnio Mar-92 Programming model: Once configuring jumper blocks J2 and J8 has determined the size and base address of the DDLC board, software has following map: top -- End of RAM (16kB/32kB) ... $200 -- Begin of RAM $100 -- DTR/DSR/SCPena -register (a bit large..) $080 -- Second DDLC registers $000 -- First DDLC registers DTR/DSR/SCPena register bit assignments: Write: 7 /DTR3 6 /DTR2 5 /DTR1 4 /DTR0 3 /SCPENA3 ONLY ONE ACTIVE AT THE TIME! 2 /SCPENA2 1 /SCPENA1 0 /SCPENA0 Read: 7 /DSR3 6 /DSR2 5 /DSR1 4 /DSR0 3 /SCPENA3 2 /SCPENA2 1 /SCPENA1 0 /SCPENA0 More info about programming from Motorola "datasheets": MC145488/D (DDLC chip) MC145474/D (ISDN S/T tranceiver) Both are small books of circa 130 pages. 5 DDLC CARD by Matti Aarnio Mar-92 Construction of DDLC card: After making decissions about used features, the actual construction is pretty straight-forward: - Only components that mandatorily need sockets are DDLC ICs (U9, U10), and of them, only U9 need to be installed for minimum configuration. Install these PLCC sockets FIRST (before bypass caps very least.) - Sockets are recommended for PALs (U3, U4), SRAM (U8), and optional ISDN S/T tranceiver (U11). (See component listing for SUnn for sockets.) - If you wish, you may use sockets also for the rest of the ICs (TTL-logic), but that is not really necessary. - Bypass capacitors are used beside EVERY IC on the board, and the DDLC's have 3 of them each. Of those caps beside the DDLC's, one is actually meant to be installed on the SOLDER side of the board. Else some machining is needed at the DDLC socket along with usage of a chip-capacitor (SMD). Install bypasses beside every used IC. (For DDLC's PLCC sockets we recommend installing the socket at first, and only then installing bypass cap BEHIND the board under it.) - Building all pin-headers needs 4 pieces of 1x20 pin-header strips. Use model which can be put beside each other to form two-wide pin-header strips. Use pliers to cut suitable pieces for use. Alternatively two pieces of 2x20 pin-headers will do just fine. (ISDN tranceiver does not need pin-plug for TE-mode selection, plain piece of wire will do. Same with IDL-links 0 and 1.) - Instead of using real 20-pin flat-cable connectors as serial connectors, you may go cheap and use pin-headers here too. (4 pcs of 2x10 = 4pcs of 1x20) - ISDN S/T tranceiver and its associated line isolation transformers and protection circuits/filters plus connecotrs all reside at the upper right corner of the board. - Of ISDN connectors, only the TE connector is usually needed, and optional use of this board as NT is just a reserved feature. - ISDN filter and protection circuitry components are to be installed in VERTICAL position, that is: take a component, bend one of its connector-leads back (180 degrees) beside another lead, and insert the component to the board (observing polarity of diodes.) Needed coils (L1,L2) are a bit large and should be installed last with attention on how high the construction will be. Layout change is necessary.. - Every component hole is platted thru, and all the vias are painted over with solder-resist. - Observe the orientation of the ICs! Some effort was put on getting most of them to be of same orientation, but one can't win allways... 6 DDLC CARD by Matti Aarnio Mar-92 Construction of V.28-level synchronous modem applique: This applique consists of a TTL-vs-V.28 level converter IC with built-in voltage doubler and inverter to generate +-10 Volts (MC145407P.) Additional conversions are done with its sister IC (MC145406P) which does not contain voltage source. - Decide on circuit-board making method: - Single-sided - Double-sided platted thru with expanded comp.side ground plane. - Double-sided version of single-sided layout (not platted thru) (Component side solid copper with openings at the pads.) - Install D-25 male connector. - Install 20-pin flat-cable connector - Install ICs - Install capacitors - Install optional 1x2 pin-header, or wire jumper for D-25 pin 1 connection (shield ground) - Install jumper-wires on single-sided layout. Use isolated wire if comp.side is copper. Ground-wire(s) should be bare, and be soldered to the possible comp.side copper. - Build proper 20-pin flat-cable and connect it to the DDLC card. 7 DDLC CARD by Matti Aarnio Mar-92 Parts: Basic board: - PCB 1 - 74LS245 Octal buffer 4 - 74LS688 8-bit magn.comp. 1 - 74LS05 Hex O.C. inverter 1 - 74LS374 Octal D-reg. 1 (This LS374, and its accompanying LS245 can be left out if nothing is to be connected to the appliques.) - HM62256N-10 32kB SRAM (120 ns or faster) 1 - 100nF cap Bypass-cap, leg-dist 0.3" 21 - 100uF cap 100uF/22V elko/tant/.. 2 - R-net.. 10kx9 SIP 2 - PAL22V10 Decoder PAL 1 - PAL16R4 Arbiter PAL 1 - Pin-headers Du Pont: 77313-118-72 1 77313-815-72 75844-922-72 (Gold platting differences) 2-row 2x36 pin structure Cannon: G02D34A4BBAA-058-058 (2x34) Usage: 2x6 + 2x3 + 2x6 (Addr, Size-sel, IRQ-sel) - Shorting plugs Du Pont: 76438, 76264 6-9 Perlos: PL1U-0,8-1 - LCS-68 PLCC socket for 68-pin JEDEC 2 (or only 1) Cannon: LCS-68-12 Du Pont: 69394-068 (This is only MANDATORY socket.) - DIP-14 DIP-socket, 14 pin 0/1 - DIP-20 DIP-socket, 20 pin 1/7 - DIP-24 DIP-socket, 24 pin 1 - DIP-28 DIP-socket, 28 pin, wide 1 Serial connectors: - CON-20 Cannon: G80D20P5BEBL-DIN2 0 to 4 G80D20P9BEBL-DIN2 G80D20P8BEBL-DIN2 G08D20A9BEAA (90 degree angled orientation. Different locking options.) 8 DDLC CARD by Matti Aarnio Mar-92 Parts: ISDN tranceiver: - MC145474P ISDN S/T tranceiver chip 1 - Xtal1 15.36 MHz 18pF parallel res. 1 - RG45J8 Du Pont: 68899-001 (via ITT) 1 - DIP-22 DIP-socket, 22 pin (MC145474) 0/1 - K0065-A Coilcraft K0065-A Xformers 2 - Pin-headers (See above) Uses 2x2 piece for S-bus termination, other jumpers can be made from solid wire links. - Shorting plugs (see above) 2 - 1N4148 Small signal diode 12 - Cap 33pF (C1,C2) 2 - Cap 56pF (C3) 1 - Res 6R91 1% (R1-R4) 4 - Res 29k4 1% (R5) 1 - Res 511R 1% (R6-R9) 4 - Res 3k3 1% (R10) 1 - Res 10M (R11) 1 - Coil 820uH (= 0.82mH) (L1,L2) 2 L1,L2,C3 form a lowpass filter at minimum 250kHz. Lower coil inductance increases the cutoff freq. (Cutoff should be in range 250kHz - 400 kHz)